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1 for more information www.linear.com/ltc3588-1 typical a pplica t ion descrip t ion nanopower energy harvesting power supply the lt c ? 3588-1 integrates a low-loss full-wave bridge rectifer with a high effciency buck converter to form a complete energy harvesting solution optimized for high output impedance energy sources such as piezoelectric, solar, or magnetic transducers. an ultralow quiescent current undervoltage lockout (uvlo) mode with a wide hysteresis window allows charge to accumulate on an input capacitor until the buck converter can effciently transfer a portion of the stored charge to the output. in regulation, the ltc3588-1 enters a sleep state in which both input and output quiescent currents are minimal. the buck converter turns on and off as needed to maintain regulation. four output voltages, 1.8v, 2.5v, 3.3v and 3.6v, are pin selectable with up to 100ma of continuous output current; however, the output capacitor may be sized to service a higher output current burst. an input protective shunt set at 20v enables greater energy storage for a given amount of input capacitance. l , lt, ltc, ltm, linear technology, the linear logo and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 100ma piezoelectric energy harvesting power supply fea t ures a pplica t ions n 950na input quiescent current (output in regulation C no load) n 450na input quiescent current in uvlo n 2.7v to 20v input operating range n integrated low-loss full-wave bridge rectifer n up to 100ma of output current n selectable output voltages of 1.8v, 2.5v, 3.3v, 3.6v n high effciency integrated hysteretic buck dc/dc n input protective shunt C up to 25ma pull-down at v in 20v n wide input undervoltage lockout (uvlo) range n available in 10-lead mse and 3mm 3mm dfn packages n piezoelectric energy harvesting n electro-mechanical energy harvesting n wireless hvac sensors n mobile asset tracking n tire pressure sensors n battery replacement for industrial sensors n remote light switches n standalone nanopower buck regulator 35881 ta01 pz1 v in cap v in2 pz2 sw v out pgood d0, d1 ltc3588-1 mide v21bl gnd 1f 6v 4.7f 6v c storage 25v 47f 6v output voltage select v out 10h 2 ltc3588-1 3.3v regulator start-up profle time (s) 0 voltage (v) 22 20 18 8 4 10 12 14 16 6 2 0 200 35881 ta01b 600 400 v in v out pgood = logic 1 c storage = 22f, c out = 47f no load, i vin = 2a ltc3588-1 35881fb
2 for more information www.linear.com/ltc3588-1 a bsolu t e maxi m u m r a t ings v in low impedance source ....................... C 0.3v to 18v* current fed, i sw = 0a ...................................... 25ma ? pz1, pz2 ........................................................... 0v to v in d0, d1 .............. C0.3v to [lesser of (v in2 + 0.3v) or 6v] cap ...................... [higher of C0.3v or (v in C 6v)] to v in v in2 .................... C0.3v to [lesser of (v in + 0.3v) or 6v] (note 1) top view 11 gnd dd package 10-lead (3mm 3mm) plastic dfn 10 9 6 7 8 4 5 3 2 1 pgood d0 d1 v in2 v out pz1 pz2 cap v in sw t jmax = 125c, ja = 43c/w, jc = 7.5c/w exposed pad (pin 11) is gnd, must be soldered to pcb 1 2 3 4 5 pz1 pz2 cap v in sw 10 9 8 7 6 pgood d0 d1 v in2 v out top view mse package 10-lead plastic emsop 11 gnd t jmax = 125c, ja = 45c/w, jc = 10c/w exposed pad (pin 11) is gnd, must be soldered to pcb p in c on f igura t ion or d er in f or m a t ion lead free finish tape and reel part marking* package description temperature range ltc3588edd-1#pbf ltc3588edd-1#trpbf lfky 10-lead (3mm 3mm) plastic dfn C40c to 125c ltc3588idd-1#pbf ltc3588idd-1#trpbf lfky 10-lead (3mm 3mm) plastic dfn C40c to 125c ltc3588emse-1#pbf ltc3588emse-1#trpbf ltfkx 10-lead plastic emsop C40c to 125c ltc3588imse-1#pbf ltc3588imse-1#trpbf ltfkx 10-lead plastic emsop C40c to 125c consult ltc marketing for parts specifed with wider operating temperature ranges. *the temperature grade is identifed by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/ v out .................... C0.3v to lesser of (v in2 + 0.3v) or 6v pgood ............... C0.3v to lesser of (v out + 0.3v) or 6v i pz1 , i pz2 .............................................................. 50ma i sw ....................................................................... 350ma operating junction temperature range (notes 2, 3) ................................................ C40 to 125c storage temperature range ....................... C65 to 150c lead temperature (soldering, 10 sec) mse only .......................................................... 300c * v in has an internal 20v clamp ? for t < 1ms and duty cycle < 1%, absolute maximum continuous current = 5ma ltc3588-1 35881fb
3 for more information www.linear.com/ltc3588-1 e lec t rical c harac t eris t ics the l denotes the specifcations which apply over the full operating junction temperature range, otherwise specifcations are for t a = 25c. (note 2) v in = 5.5v unless otherwise specifed. symbol parameter conditions min typ max units v in input voltage range low impedance source on v in l 18.0 v i vin v in quiescent current uvlo buck enabled, sleeping buck enabled, sleeping buck enabled, not sleeping v in = 2.5v, not pgood v in = 4.5v v in = 18v i sw = 0a (note 4) 450 950 1.7 150 700 1500 2.5 250 na na a a v uvlo v in undervoltage lockout threshold v in rising 1.8v output selected; d1 = 0, d0 = 0 2.5v output selected; d1 = 0, d0 = 1 3.3v output selected; d1 = 1, d0 = 0 3.6v output selected; d1 = 1, d0 = 1 l l l l 3.77 3.77 4.73 4.73 4.04 4.04 5.05 5.05 4.30 4.30 5.37 5.37 v v v v v in falling 1.8v output selected; d1 = 0, d0 = 0 2.5v output selected; d1 = 0, d0 = 1 3.3v output selected; d1 = 1, d0 = 0 3.6v output selected; d1 = 1, d0 = 1 l l l l 2.66 2.66 3.42 3.75 2.87 2.87 3.67 4.02 3.08 3.08 3.91 4.28 v v v v v shunt v in shunt regulator voltage i vin = 1ma 19.0 20.0 21.0 v i shunt maximum protective shunt current 1ms duration 25 ma internal bridge rectifer loss (|v pz1 C v pz2 | C v in ) i bridge = 10a 350 400 450 mv internal bridge rectifer reverse leakage current v reverse = 18v 20 na internal bridge rectifer reverse breakdown voltage i reverse = 1a v shunt 30 v v out regulated output voltage 1.8v output selected sleep threshold wake-up threshold 2.5v output selected sleep threshold wake-up threshold 3.3v output selected sleep threshold wake-up threshold 3.6v output selected sleep threshold wake-up threshold l l l l l l l l 1.710 2.425 3.201 3.492 1.812 1.788 2.512 2.488 3.312 3.288 3.612 3.588 1.890 2.575 3.399 3.708 v v v v v v v v pgood falling threshold as a per centage of the selected v out 83 92 % i vout output quiescent current v out = 3.6v 89 150 na i peak buck peak switch current 200 260 350 ma i buck available buck output current 100 ma r p buck pmos switch on-resistance 1.1 ? r n buck nmos switch on-resistance 1.3 ? max buck duty cycle l 100 % v ih(d0, d1) d0/d1 input high voltage l 1.2 v v il(d0, d1) d0/d1 input low voltage l 0.4 v i ih(d0, d1) d0/d1 input high current 10 na i il(d0, d1) d0/d1 input low current 10 na ltc3588-1 35881fb
4 for more information www.linear.com/ltc3588-1 typical p er f or m ance c harac t eris t ics i vin in uvlo vs v in i vin in sleep vs v in uvlo rising vs temperature uvlo falling vs temperature v shunt vs temperature total bridge rectifer drop vs bridge current temperature (c) ?55 uvlo rising (v) 5.2 5.0 4.6 4.2 4.8 4.4 4.0 3.8 25 105 ?15 65 35881 g03 125 5 85 ?35 45 d1 = d0 = 1 d1 = d0 = 0 temperature (c) ?55 uvlo falling (v) 4.2 4.0 3.6 3.2 3.8 3.4 3.0 2.8 25 105 ?15 65 35881 g04 125 5 85 ?35 45 d1 = d0 = 1 d1 = d0 = 0 d1 = 1, d0 = 0 bridge current (a) v bridge (mv) 35881 g06 1800 1600 1400 1200 1000 800 600 400 200 0 1 10 10m 1m 100 85c 25c ?40c |v pz1 ? v pz2 | ? v in v in (v) 0 i vin (na) 1000 900 700 500 800 600 400 300 200 100 0 4 5 2 35881 g01 6 3 1 d1 = d0 = 1 85c 25c ?40c v in (v) 2 i vin (na) 2400 2200 1800 1400 2000 1600 1200 1000 800 600 400 14 8 10 16 35881 g02 18 12 64 d1 = d0 = 0 85c 25c ?40c temperature (c) ?55 v shunt (v) 21.0 20.8 20.4 20.0 20.6 20.2 19.6 19.8 19.4 19.2 19.0 65 5 25 85 105 35881 g05 125 45 ?15?35 i shunt = 25ma i shunt = 1ma e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3588-1 is tested under pulsed load conditions such that t j t a . the ltc3588e-1 is guaranteed to meet specifcations from 0c to 85c junction temperature. specifcations over the C40c to 125c operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. the ltc3588i-1 is guaranteed over the full C40c to 125c operating junction temperature range. note that the maximum ambient temperature consistent with these specifcations is determined by specifc operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. note 3: the junction temperature (t j , in c) is calculated from the ambient temperature (t a , in c) and power dissipation (p d , in watts) according to the formula: t j = t a + (p d ? ja ), where f ja (in c/w) is the package thermal impedance. note 4: dynamic supply current is higher due to gate charge being delivered at the switching frequency. ltc3588-1 35881fb
5 for more information www.linear.com/ltc3588-1 typical p er f or m ance c harac t eris t ics 3.6v output vs temperature v out load regulation v out line regulation 1.8v output vs temperature 2.5v output vs temperature 3.3v output vs temperature temperature (c) ?55 v out (v) 1.85 1.80 1.70 1.75 1.65 1.60 25 105 ?15 65 35881 g09 125 5 85 ?35 45 sleep threshold wake-up threshold pgood falling temperature (c) ?55 v out (v) 2.55 2.50 2.35 2.45 2.30 2.40 2.25 25 105 ?15 65 35881 g10 125 5 85 ?35 45 sleep threshold wake-up threshold pgood falling temperature (c) ?55 v out (v) 3.35 3.30 3.15 3.05 3.25 3.10 3.20 3.00 25 105 ?15 65 35881 g11 125 5 85 ?35 45 sleep threshold wake-up threshold pgood falling temperature (c) ?55 v out (v) 3.65 3.55 3.40 3.30 3.50 3.60 3.35 3.45 3.25 25 105 ?15 65 35881 g12 125 5 85 ?35 45 sleep threshold wake-up threshold pgood falling load current (a) v out (v) 35881 g13 2.56 2.54 2.46 2.48 2.50 2.52 2.44 1 10 10m 100m 1m 100 v in = 5v, l = 10h, d1 = 0, d0 = 1 v in (v) v out (v) 35881 g14 2.56 2.54 2.46 2.48 2.50 2.52 2.44 4 6 16 18 14 8 10 12 l = 10h, i load = 100ma, d1 = 0, d0 = 1 i vout vs temperature temperature (c) ?55 i vout (na) 120 100 70 60 50 30 90 110 40 80 20 25 105 ?15 65 35881 g15 125 5 85 ?35 45 v out = 3.6v v out = 3.3v v out = 2.5v v out = 1.8v temperature (c) ?55 bridge leakage (na) 20 18 14 10 16 12 6 8 4 2 0 8035 125 35881 g07 170 ?10 v in = 18v, leakage at pz1 or pz2 bridge leakage vs temperature bridge frequency response frequency (hz) v in (v) 35881 g08 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 10 100 100m10m1m 10k1k 100k 4v p-p applied to pz1/pz2 input measured in uvlo ltc3588-1 35881fb
6 for more information www.linear.com/ltc3588-1 typical p er f or m ance c harac t eris t ics effciency vs v in for i load = 100ma, l = 100h effciency vs v in for v out = 3.3v, l = 100h effciency vs v in for i load = 100ma, l = 10h effciency vs v in for v out = 3.3v, l = 10h v in (v) efficiency (%) 35881 g20 100 90 50 60 70 80 40 2 10864 16 18 1412 v out = 1.8v v out = 2.5v v out = 3.3v v out = 3.6v v in (v) efficiency (%) 35881 g21 95 85 45 55 65 75 35 4 1086 16 18 1412 i load = 10a i load = 30a i load = 50a i load = 100a i load = 100ma effciency vs i load , l = 100h load current (a) efficiency (%) 35881 g22 100 90 10 20 30 80 70 60 50 40 0 v in = 5v v out = 1.8v v out = 2.5v v out = 3.3v v out = 3.6v 1 10 10m 100m 1m 100 v in (v) efficiency (%) 35881 g23 100 90 80 70 60 50 40 2 864 18 10 12 14 16 v out = 1.8v v out = 2.5v v out = 3.3v v out = 3.6v v in (v) efficiency (%) 35881 g24 95 85 45 55 65 75 35 4 1086 16 18 1412 i load = 10a i load = 30a i load = 50a i load = 100a i load = 100ma effciency vs i load , l = 10h load current (a) efficiency (%) 35881 g19 100 90 30 40 50 60 70 80 20 10 0 1 10 10m 100m 1m 100 v in = 5v v out = 1.8v v out = 2.5v v out = 3.3v v out = 3.6v i peak vs temperature r ds(on) of pmos/nmos vs temperature temperature (c) ?55 i peak (ma) 300 280 250 240 230 210 270 290 220 260 200 25 105 ?15 65 35881 g16 125 5 85 ?35 45 temperature (c) ?55 r ds(on) () 2.0 1.6 1.0 1.4 1.8 1.2 0.8 25 105 ?15 65 35881 g17 125 5 85 ?35 45 pmos nmos operating waveforms 5s/div output voltage 50mv/div ac-coupled inductor current 200ma/div v in = 5v, v out = 3.3v i load = 1ma l = 10h, c out = 47f switch voltage 2v/div 0ma 0v 35881 g18 ltc3588-1 35881fb
7 for more information www.linear.com/ltc3588-1 p in func t ions pz1 (pin 1): input connection for piezoelectric element or other ac source (used in conjunction with pz2). pz2 (pin 2): input connection for piezoelectric element or other ac source (used in conjunction with pz1). cap (pin 3): internal rail referenced to v in to serve as gate drive for buck pmos switch. a 1f capacitor should be connected between cap and v in . this pin is not intended for use as an external system rail. v in (pin 4): rectifed input voltage. a capacitor on this pin serves as an energy reservoir and input supply for the buck regulator. the v in voltage is internally clamped to a maximum of 20v (typical). sw (pin 5): switch pin for the buck switching regulator. a 10h or larger inductor should be connected from sw to v out . v out (pin 6): sense pin used to monitor the output volt- age and adjust it through internal feedback. v in2 (pin 7): internal low voltage rail to serve as gate drive for buck nmos switch. also serves as a logic high rail for output voltage select bits d0 and d1. a 4.7f capacitor should be connected from v in2 to gnd. this pin is not intended for use as an external system rail. d1 (pin 8): output voltage select bit. d1 should be tied high to v in2 or low to gnd to select desired v out (see table 1). d0 (pin 9): output voltage select bit. d0 should be tied high to v in2 or low to gnd to select desired v out (see table 1). pgood (pin 10): power good output is logic high when v out is above 92% of the target value. the logic high is referenced to the v out rail. gnd (exposed pad pin 11): ground. the exposed pad should be connected to a continuous ground plane on the second layer of the printed circuit board by several vias directly under the ltc3588-1. b lock diagra m 35881 bd d1, d0 pz2 pz1 v in uvlo buck control internal rail generation 2 bandgap reference sleep pgood comparator cap sw gnd pgood v in2 v out 20v 5 3 7 11 10 6 8, 9 2 1 4 ltc3588-1 35881fb
8 for more information www.linear.com/ltc3588-1 the ltc3588-1 is an ultralow quiescent current power supply designed specifcally for energy harvesting and/or low current step-down applications. the part is designed to interface directly to a piezoelectric or alternative a/c power source, rectify a voltage waveform and store harvested energy on an external capacitor, bleed off any excess power via an internal shunt regulator, and maintain a regulated output voltage by means of a nanopower high effciency synchronous buck regulator. internal bridge rectifer the ltc3588-1 has an internal full-wave bridge rectifer accessible via the differential pz1 and pz2 inputs that rectifes ac inputs such as those from a piezoelectric element. the rectifed output is stored on a capacitor at the v in pin and can be used as an energy reservoir for the buck converter. the low-loss bridge rectifer has a total drop of about 400mv with typical piezo generated currents (~10a). the bridge is capable of carrying up to 50ma. one side of the bridge can be operated as a single-ended dc input. pz1 and pz2 should never be shorted together when the bridge is in use. undervoltage lockout (uvlo) when the voltage on v in rises above the uvlo rising threshold the buck converter is enabled and charge is transferred from the input capacitor to the output capacitor. a wide (~1v) uvlo hysteresis window is employed with a lower threshold approximately 300mv above the selected regulated output voltage to prevent short cycling during buck power-up. when the input capacitor voltage is depleted below the uvlo falling threshold the buck converter is disabled. extremely low quiescent current (450na typical) in uvlo allows energy to accumulate on the input capacitor in situations where energy must be harvested from low power sources. internal rail generation two internal rails, cap and v in2 , are generated from v in and are used to drive the high side pmos and low side nmos of the buck converter, respectively. additionally the v in2 rail serves as logic high for output voltage select bits d0 and d1. the v in2 rail is regulated at 4.8v above gnd while the cap rail is regulated at 4.8v below v in . these are not intended to be used as external rails. bypass capacitors are connected to the cap and v in2 pins to serve as energy reservoirs for driving the buck switches. when v in is below 4.8v, v in2 is equal to v in and cap is held at gnd. figure 1 shows the ideal v in , v in2 and cap relationship. figure 1. ideal v in , v in2 and cap relationship opera t ion buck operation the buck regulator uses a hysteretic voltage algorithm to control the output through internal feedback from the v out sense pin. the buck converter charges an output capacitor through an inductor to a value slightly higher than the regulation point. it does this by ramping the inductor current up to 260ma through an internal pmos switch and then ramping it down to 0ma through an internal nmos switch. this effciently delivers energy to the output capacitor. the ramp rate is determined by v in , v out , and the inductor value. if the input voltage falls below the v in (v) 0 voltage (v) 18 12 14 16 10 2 4 8 6 0 10 5 35881 f01 15 v in v in2 cap ltc3588-1 35881fb
9 for more information www.linear.com/ltc3588-1 opera t ion uvlo falling threshold before the output voltage reaches regulation, the buck converter will shut off and will not be turned on until the input voltage again rises above the uvlo rising threshold. during this time the output voltage will be loaded by less than 100na. when the buck brings the output voltage into regulation the converter enters a low quiescent current sleep state that monitors the output voltage with a sleep comparator. during this operating mode load current is provided by the buck output capacitor. when the output voltage falls below the regulation point the buck regulator wakes up and the cycle repeats. this hysteretic method of providing a regulated output reduces losses associated with fet switching and maintains an output at light loads. the buck delivers a minimum of 100ma of average load current when it is switching. when the sleep comparator signals that the output has reached the sleep threshold the buck converter may be in the middle of a cycle with current still fowing through the inductor. normally both synchronous switches would turn off and the current in the inductor would freewheel to zero through the nmos body diode. the ltc3588-1 keeps the nmos switch on during this time to prevent the conduction loss that would occur in the diode if the nmos were off. if the pmos is on when the sleep comparator trips the nmos will turn on immediately in order to ramp down the current. if the nmos is on it will be kept on until the current reaches zero. though the quiescent current when the buck is switching is much greater than the sleep quiescent current, it is still a small percentage of the average inductor current which results in high effciency over most load conditions. the buck operates only when suffcient energy has been ac - cumulated in the input capacitor and the length of time the converter needs to transfer energy to the output is much less than the time it takes to accumulate energy . thus, the buck operating quiescent current is averaged over a long period of time so that the total average quiescent current is low . this feature accommodates sources that harvest small amounts of ambient energy. four selectable voltages are available by tying the output select bits, d0 and d1, to gnd or v in2 . table 1 shows the four d0/d1 codes and their corresponding output voltages. table 1. output voltage selection d1 d0 v out v out quiescent current (i vout ) 0 0 1.8v 44na 0 1 2.5v 62na 1 0 3.3v 81na 1 1 3.6v 89na the internal feedback network draws a small amount of current from v out as listed in table 1. power good comparator a power good comparator produces a logic high referenced to v out on the pgood pin the frst time the converter reaches the sleep threshold of the programmed v out , signaling that the output is in regulation. the pgood pin will remain high until v out falls to 92% of the desired regulation voltage. several sleep cycles may occur during this time. additionally, if pgood is high and v in falls below the uvlo falling threshold, pgood will remain high until v out falls to 92% of the desired regulation point. this allows output energy to be used even if the input is lost. figure 2 shows the behavior for v out = 3.6v and no load. at t = 75s v in becomes high impedance and is discharged by the quiescent current of the ltc3588-1 and through servicing v out which is discharged by its own leakage current. v in crosses uvlo falling but pgood remains high until v out decreases to 92% of the desired regulation point. the pgood pin is designed to drive a microprocessor or other chip i/o and is not intended to drive higher current loads such as an led. time (s) 0 voltage (v) 6 3 4 5 2 1 0 200 100 35881 f02 300 v in v in = uvlo falling v out pgood c vin = c vout = 100f figure 2. pgood operation during transition to uvlo ltc3588-1 35881fb
10 for more information www.linear.com/ltc3588-1 o pera t ion the d0/d1 inputs can be switched while in regulation as shown in figure 3. if v out is programmed to a voltage with a pgood falling threshold above the old v out , pgood will transition low until the new regulation point is reached. when v out is programmed to a lower voltage, pgood will remain high through the transition. energy storage harvested energy can be stored on the input capacitor or the output capacitor. the wide input range takes advantage of the fact that energy storage on a capacitor is proportional to the square of the capacitor voltage. after the output voltage is brought into regulation any excess energy is stored on the input capacitor and its voltage increases. when a load exists at the output the buck can effciently transfer energy stored at a high voltage to the regulated output. while energy storage at the input utilizes the high voltage at the input, the load current is limited to what the buck converter can supply. if larger loads need to be serviced the output capacitor can be sized to support a larger current for some duration. for example, a current burst could begin when pgood goes high and would continuously deplete the output capacitor until pgood went low. figure 3. pgood operation during d0/d1 transition time (ms) 0 v out voltage (v) 5 4 3 2 1 0 18161412108642 35881 f03 20 c out = 100f, i load = 100ma v out d1=d0=0 pgood = logic1 d1=d0=1 d1=d0=0 ltc3588-1 35881fb
11 for more information www.linear.com/ltc3588-1 introduction the ltc3588-1 harvests ambient vibrational energy through a piezoelectric element in its primary application. common piezoelectric elements are pzt (lead zirconate titanate) ceramics, pvdf (polyvinylidene fuoride) poly - mers, or other composites. ceramic piezoelectric elements exhibit a piezoelectric effect when the cr ystal structure of the ceramic is compressed and internal dipole move - ment produces a voltage. polymer elements comprised of long-chain molecules produce a voltage when fexed as molecules repel each other. ceramics are often used under direct pressure while a polymer can be fexed more readily. a wide range of piezoelectric elements are avail - able and produce a variety of open-circuit voltages and short-cir cuit currents. t ypically the open-circuit voltage and short-circuit currents increase with available vibrational energy as shown in figure 4. piezoelectric elements can be placed in series or in parallel to achieve desired open- circuit voltages. a pplica t ions i n f or m a t ion the ltc3588-1 is well-suited to a piezoelectric energy harvesting application. the 20v input protective shunt can accommodate a variety of piezoelectric elements. the low quiescent current of the ltc3588-1 enables effcient energy accumulation from piezoelectric elements which can have short-circuit currents on the order of tens of microamps. piezoelectric elements can be obtained from manufacturers listed in table 2. table 2. piezoelectric element manufacturers advanced cerametrics www.advancedcerametrics.com piezo systems www.piezo.com measurement specialties www.meas-spec.com pi (physik instrumente) www.pi-usa.us mide technology corporation www.mide.com morgan technical ceramics www.morganelectroceramics.com t he ltc3588-1 will gather energy and convert it to a use- able output voltage to power microprocessors, wireless sensors, and wireless transmission components. such a wireless sensor application may require much more peak power than a piezoelectric element can produce. however, the ltc3588-1 accumulates energy over a long period of time to enable effcient use for short power bursts. for continuous operation, these bursts must occur with a low duty cycle such that the total output energy during the burst does not exceed the average source power integrated over an energy accumulation cycle. for piezoelectric inputs the time between cycles could be minutes, hours, or longer depending on the selected capacitor values and the nature of the vibration source. figure 4. typical piezoelectric load lines for piezo systems t220-a4-503x piezo current (a) 0 piezo voltage (v) 12 9 6 3 0 20 10 35881 f04 30 increasing vibration energy ltc3588-1 35881fb
12 for more information www.linear.com/ltc3588-1 applica t ions in f or m a t ion pgood signal the pgood signal can be used to enable a sleeping microprocessor or other circuitry when v out reaches regulation, as shown in figure 5. typically v in will be somewhere between the uvlo thresholds at this time and a load could only be supported by the output capacitor. alternatively, waiting a period of time after pgood goes high would let the input capacitor accumulate more energy allowing load current to be maintained longer as the buck effciently transfers that energy to the output. while active, a microprocessor may draw a small load when operating sensors, and then draw a large load to transmit data. figure 5 shows the ltc3588-1 responding smoothly to such a load step. input and output capacitor selection the input and output capacitors should be selected based on the energy needs and load requirements of the application. in every case the v in capacitor should be rated to withstand the highest voltage ever present at v in . for 100ma or smaller loads, storing energy at the input takes advantage of the high voltage input since the buck can deliver 100ma average load current effciently to the output. the input capacitor should then be sized to store enough energy to provide output power for the length of time required. this may involve using a large capacitor, letting v in charge to a high voltage, or both. enough energy should be stored on the input so that the buck does not reach the uvlo falling threshold which would halt energy transfer to the output. in general: p load t load = 1 2 c in v in 2 ? v uvlofalling 2 ( ) v uvlofalling v in v shunt the above equation can be used to size the input capaci - tor to meet the power requirements of the output for the desired duration. here is the average effciency of the buck converter over the input range and v in is the input voltage when the buck begins to switch. this equation may overestimate the input capacitor necessary since load current can deplete the output capacitor all the way to the lower pgood threshold. it also assumes that the input source charging has a negligible effect during this time. the duration for which the regulator sleeps depends on the load current and the size of the output capacitor. the sleep time decreases as the load current increases and/or as the output capacitor decreases. the dc sleep hysteresis window is 12mv around the programmed output volt- age. ideally this means that the sleep time is determined by the following equation: t sleep = c out 24mv i load 35881 f05a 35881 f05b pz1 v in cap v in2 d1 d0 pz2 pgood sw v out ltc3588-1 microprocessor gnd 1f 6v 4.7f 6v 10f 25v 47f 6v 10h 3.3v en core gnd t x 250s/div v in = 5v l = 10h, c out = 47f load step between 5ma and 55ma output voltage 20mv/div ac-coupled load current 25ma/div 5ma mide v21bl figure 5. 3.3v piezoelectric energy harvester powering a microprocessor with a wireless transmitter and 50ma load step response ltc3588-1 35881fb
13 for more information www.linear.com/ltc3588-1 a pplica t ions i n f or m a t ion this is true for output capacitors on the order of 100f or larger, but as the output capacitor decreases towards 10f delays in the internal sleep comparator along with the load current may result in the v out voltage slewing past the 12mv thresholds. this will lengthen the sleep time and increase v out ripple. a capacitor less than 10f is not recommended as v out ripple could increase to an undesirable level. if transient load currents above 100ma are required then a larger capacitor can be used at the output. this capacitor will be continuously discharged during a load condition and the capacitor can be sized for an acceptable drop in v out : c out = v out+ ? v out? ( ) i load ? i buck t load here v out+ is the value of v out when pgood goes high and v outC is the desired lower limit of v out . i buck is the average current being delivered from the buck converter, typically i peak /2. a standard surface mount ceramic capacitor can be used for c out , though some applications may be better suited to a low leakage aluminum electrolytic capacitor or a supercapacitor. these capacitors can be obtained from manufacturers such as vishay, illinois capacitor, avx, or cap-xx. inductor the buck is optimized to work with an inductor in the range of 10h to 22h, although inductor values outside this range may yield benefts in some applications. for typical applications, a value of 10h is recommended. a larger inductor will beneft high voltage applications by increasing the on-time of the pmos switch and improving effciency by reducing gate charge loss. choose an inductor with a dc current rating greater than 350ma. the dcr of the inductor can have an impact on effciency as it is a source of loss. tradeoffs between price, size, and dcr should be evaluated. table 3 lists several inductors that work well with the ltc3588-1. table 3. recommended inductors for ltc3588-1 inductor type l (h) max i dc (ma) max dcr () size in mm (l w h) manu- facturer cdrh2d18/ldnp 10 430 0.180 3 3 2 sumida 107as-100m 10 650 0.145 2.8 3 1.8 toko epl3015-103ml 10 350 0.301 2.8 3 1.5 coilcraft mlp3225s100l 10 1000 0.130 3.2 2.5 1.0 tdk xlp2010-163ml 10 490 0.611 2.0 1.9 1.0 coilcraft slf7045t 100 500 0.250 7.0 7.0 4.5 tdk v in2 and cap capacitors a 1f capacitor should be connected between v in and cap and a 4.7f capacitor should be connected between v in2 and gnd. these capacitors hold up the internal rails during buck switching and compensate the internal rail generation circuits. in applications where the input source is limited to less than 6v, the cap pin can be tied to gnd and the v in2 pin can be tied to v in as shown in figure 6. an optional 5.6v zener diode can be connected to v in to clamp v in in this scenario. the leakage of the zener diode below its zener voltage should be considered as it may be comparable to the quiescent current of the ltc3588-1. this circuit does not require the capacitors on v in2 and cap, saving components and allowing a lower voltage rating for the single v in capacitor. figure 6. smallest solution size 1.8v low voltage input piezoelectric power supply 35881 f06 pz1 v in v in2 cap d1 d0 pz2 pgood sw v out ltc3588-1 gnd 10f 6v 10h v out 1.8v pgood 10f 6v 5.6v (optional) mide v21bl ltc3588-1 35881fb
14 for more information www.linear.com/ltc3588-1 applica t ions in f or m a t ion figure 8. piezo energy harvester with battery backup additional applications with piezo inputs the versatile ltc3588-1 can be used in a variety of con - fgurations. figure 7 shows a single piezo source powering two ltc3588-1s simultaneously , providing capability for multiple rail systems. this setup features automatic sup - ply sequencing as the ltc3588-1 with the lower voltage output (i.e. lower uvlo rising threshold) will come up frst. as the piezo provides input power both v in rails will initially come up together, but when one output starts drawing power, only its corresponding v in will fall as the bridges of each ltc3588-1 provide isolation. input piezo energy will then be directed to this lower voltage capacitor until both v in rails are again equal. this confguration is expandable to any number of ltc3588-1s powered by a single piezo as long as the piezo can support the sum total of the quiescent currents from each ltc3588-1. a piezo powered ltc3588-1 can also be used in concert with a battery connected to v in to supplement the system if ambient vibrational energy ceases as shown in figure 8. a blocking diode placed in series with the battery to v in prevents reverse current in the battery if the piezo source charges v in past the battery voltage. a 9v battery is shown, but any stack of batteries of a given chemistry can be used as long as the battery stack voltage does not exceed 18v. in this setup the presence of the piezo energy harvester can greatly increase the life of the battery. if the piezo source is removed the ltc3588-1 can serve as a standalone nanopower buck converter. in this case the bridge is unused and the blocking diode is unnecessary. figure 7. dual rail power supply with single piezo and automatic supply sequencing 35881 f07 pz1 v in cap v in2 d1 d0 pz2 pgood sw v out ltc3588-1 gnd 10f 6v 10f 6v 10h 10h 1.8v 3.6v pgood2 pgood1 1f 6v pz2 v in cap v in2 d1 d0 pz1 pgood sw v out ltc3588-1 gnd 4.7f 6v 1f 6v 4.7f 6v 10f 25v 10f 25v mide v25w 35881 f08 pz1 v in cap v in2 d1 d0 pz2 pgood sw v out ltc3588-1 piezo systems t220-a4-503x ir05h40csptr gnd 47f 6v 10h v out 3.3v pgood 100f 16v 9v battery 1f 6v 4.7f 6v ltc3588-1 35881fb
15 for more information www.linear.com/ltc3588-1 figure 9. ac line powered 3.6v buck regulator with large output capacitor to support heavy loads 35881 f09 pz1 v in cap v in2 d1 d0 pz2 pgood sw v out ltc3588-1 danger! high voltage! gnd 150k 100f 6v 10h v out 3.6v pgood 10f 25v 120vac 60hz 1f 6v 4.7f 6v 150k 150k 150k dangerous and lethal potentials are present in offline circuits! before proceeding any further, the reader is warned that caution must be used in the construction, testing and use of offline circuits. extreme caution must be used in working with and making connections to these circuits. repea t : offline circuits contain dangerous, ac line-connected high voltage potentials. use caution. all testing performed on an offline circuit must be done with an isolation transformer connected between the offline circui t ?s input and the ac line. users and constructors of offline circuits must observe this precaution when connecting test equipment to the circuit to avoid electric shock. repea t : an isolation transformer must be connected between the circuit input and the ac line if any test equipment is to be connected. a pplica t ions i n f or m a t ion alternate power sources the ltc3588-1 is not limited to use with piezoelectric ele - ments but can accommodate a wide variety of input sources d ep e nding on the type of ambient energy available. figure 9 shows the ltc3588-1 internal bridge rectifer connected to the ac line in series with four 150k current limiting resistors. this is a high voltage application and minimum spacing between the line, neutral, and any high voltage components should be maintained per the applicable ul specifcation. for general off-line applications refer to ul regulation 1012. figure 10 shows an application where copper panels are placed near a standard fuorescent room light to capacitively figure 10. electric field energy harvester 35881 f10 pz1 v in cap v in2 d1 d0 pz2 pgood sw v out ltc3588-1 gnd 10f 6v 10h 3.3v pgood 10f 25v 1f 6v 4.7f 6v copper panel (12" 24") copper panel (12" 24") panels are placed 6" from 2' 4' fluorescent light fixtures harvest energy from the electric feld around the light. the frequency of the emission will be 120hz for magnetic ballasts but could be higher if the light uses electronic ballast. the ltc3588-1 bridge rectifer can handle a wide range of input frequencies. the ltc3588-1 can also be confgured for use with dc sources such as a solar panel or thermal couple as shown in figures 11 and 12 by connecting them to one of the pz1/pz2 inputs. connecting the two sources in this way prevents reverse current from fowing in each element. current limiting resistors should be used to protect the pz1 or pz2 pins. this can be combined with a battery backup connected to v in with a blocking diode. ltc3588-1 35881fb
16 for more information www.linear.com/ltc3588-1 applica t ions in f or m a t ion figure 11. 5v to 16v solar-powered 2.5v supply with supercapacitor for increased output energy storage and battery backup 35881 f11 pz1 v in cap v in2 d0 d1 pz2 pgood sw v out ltc3588-1 gnd 300 ir05h4ocsptr 3f 2.7v 10f 6v ness super capacitor eshsr-0003co-002r7 10h v out 2.5v pgood 100f 25v 9v battery 1f 6v 4.7f 6v 5v to 16v solar panel + ? + 35881 f12 pz1 v in cap v in2 d0 d1 pz2 pgood sw v out ltc3588-1 gnd 47f 6v 10h v out 2.5v pgood 1f 16v 1f 6v 4.7f 6v r s , 5.2 100 5.4v pg-1 thermal generator p/n g1-1.0-127-1.27 (tellurex) ?t = 100c figure 12. thermoelectric energy harvester 33881 ta03 pz1 v in cap v in2 d1 d0 pz2 pgood sw v out ltc3588-1 gnd 10f 25v 47f 6v 22h 1f 6v 4.7f 6v 2.2f 10v 1f 6v 4.7f 6v v in cap v in2 en d1 d0 pgood sw v out stby ltc3388-3 * gnd 47f 6v ?3.3v 3.3v 22h * exposed pad must be electrically isolated from system ground and connected to the ?3.3v rail. figure 13. piezoelectric energy harvester with 3.3v outputs ltc3588-1 35881fb
17 for more information www.linear.com/ltc3588-1 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dd) dfn rev c 0310 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.70 0.05 3.55 0.05 package outline 0.25 0.05 0.50 bsc pin 1 notch r = 0.20 or 0.35 45 chamfer dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699 rev c) p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. ltc3588-1 35881fb
18 for more information www.linear.com/ltc3588-1 p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. msop (mse) 0213 rev i 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1 2 3 4 5 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8910 10 1 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 1.68 0.102 (.066 .004) 1.88 0.102 (.074 .004) 0.50 (.0197) bsc 0.305 0.038 (.0120 .0015) typ bottom view of exposed pad option 1.68 (.066) 1.88 (.074) 0.1016 0.0508 (.004 .002) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.05 ref 0.29 ref mse package 10-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1664 rev i) ltc3588-1 35881fb
19 for more information www.linear.com/ltc3588-1 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 9/10 updated/added part number on the piezoelectric transducer on the front and back page applications, and figures 5, 6 and 7 updated temperature range in order information changed t j = 25c to t a = 25c and i load to i buck in electrical characteristics updated notes 2, 3 and 4 updated g21 in typical performance characteristics added figure 13 updated related parts 1, 12, 13, 14, 20 2 3 4 6 16 20 b 7/14 clarifed title and description clarifed x-axis label on figure 1 clarifed figure 8 clarifed related parts list 1 8 14 20 ltc3588-1 35881fb
20 for more information www.linear.com/ltc3588-1 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 ? linear technology corporation 2010 lt 0714 rev b ? printed in usa (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltc3588-1 r ela t e d p ar t s typical a pplica t ion part number description comments lt1389 nanopower precision shunt voltage reference 800na operating current, 1.25v/2.5v/4.096v ltc1540 nanopower comparator with reference 0.3a i q , drives 0.01f, adjustable hysteresis, 2v to 11v input range lt3009 3a i q , 20ma low dropout linear regulator low 3a i q , 1.6v to 20v range, 20ma output current ltc3388-1/ ltc3388-3 20v high effciency nanopower step-down regulator 860na i q in sleep, 2.7v to 20v input, v out : 1.2v to 5.0v, enable and standby pins ltc3588-2 nanopower energy harvesting power supply <1a i q in regulation, uvlo rising = 16v, uvlo falling = 14v, v out = 3.45v, 4.1v, 4.5v 5.0v lt3652 power tracking 2a battery charger for solar power mppt for solar, 4.95v to 32v, up to 2a charge current lt3970 40v, 350ma step-down regulator with 2.5a i q integrated boost and catch diodes, 4.2v to 40v operating range lt3971 38v, 1.2a, 2mhz step-down regulator with 2.8a i q 4.3v to 38v operating range, low ripple burst mode ? operation lt3991 55v, 1.2a 2mhz step-down regulator with 2.8a i q 4.3v to 55v operating range, low ripple burst mode operation ltc3631 45v, 100ma, synchronous step-down regulator with 12a i q 4.5v to 45v operating range, overvoltage lockout up to 60v ltc3642 45v, 50ma, synchronous step-down regulator with 12a i q 4.5v to 45v operating range, overvoltage lockout up to 60v ltc3330 nanopower buck-boost dc/dc with energy harvesting battery life extender v in : 2.7v to 20v, bat: 1.8v to 5.5v, 750na i q , 5mm 5mm qfn-32 package ltc3331 nanopower buck-boost dc/dc with energy harvesting batter y charger v in : 2.7v to 20v, bat: up to 4.2v, shunt charger, low battery disconnect, 950na i q , 5mm 5mm qfn-32 package piezoelectric 3.3v power supply with ldo post regulator for reduced output ripple 35881 ta02a pz1 v in cap v in2 d1 d0 pz2 pgood sw v out ltc3588-1 lt3009-3.3 gnd 1f 6v 4.7f 6v 47f 25v c out1 10f 6v c out2 1f 6v 10h v out1 3.6v shdn in out gnd v out2 3.3v 20ma advanced cerametrics pfcb-w14 peak-to-peak output ripple vs c out1 c out1 (f) c out2 = 1f v out ripple peak-to-peak (mv) 35881 ta02b 120 60 0 40 20 80 100 10 100 v out1 (ltc3588-1) v out2 (lt3009-3.3) ltc3588-1 35881fb

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